PGASLFT=0, PGADISC=0, PGADISA=0, SDADTMD=0, SDADSCM=0
Sigma-delta A/D Converter Control Register 1
| SDADSCM | Selection of autoscan mode 0 (0): Continuous scan mode 1 (1): Single scan mode |
| Reserved | These bits are read as 000. The write value should be 000. |
| SDADTMD | Selection of A/D conversion trigger signal 0 (0): Software trigger (conversion is started by a write to SFR) 1 (1): Hardware trigger (conversion is started in synchronization with the event signal selected by ELC_SDADC24). |
| Reserved | These bits are read as 000. The write value should be 000. |
| SDADBMP | A/D conversion control of the signal from input multiplexer |
| Reserved | These bits are read as 000. The write value should be 000. |
| PGADISA | Control of disconnection detection 0 (0): Normal operation 1 (1): State of disconnection detection |
| PGADISC | Disconnection Detection Assist Setting 0 (0): Discharge 1 (1): Pre-charge |
| Reserved | These bits are read as 00. The write value should be 00. |
| PGASLFT | PGA offset self-diagnosis enable 0 (0): Disable PGA offset self-diagnosis 1 (1): Enable PGA offset self-diagnosis |
| Reserved | These bits are read as 00000000000. The write value should be 00000000000. |